HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 654

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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17. Pin Function Controller (PFC)
Notes: 1. The initial value is 1 in the on-chip ROM disabled external-expansion mode.
Rev.4.00 Mar. 27, 2008 Page 608 of 882
REJ09B0108-0400
Register Bit
PBCR1
PBCR2
PBCR2
PBCR2
PBCR2
2. Masked ROM version and ROM less version only. Setting prohibited for the F-ZTAT
10
5
4
2
0
version and emulator.
Bit Name
PB2MD2
PB2MD1
PB2MD0
PB1MD
PB0MD
Initial
Value
0
0
0
0*
0*
1
1
R/W
R/W
R/W
R/W
R/W
R/W
Description
PB2 Mode
Select the function of the
PB2/IRQ0/POE0/SCL0 pin.
000: PB2 I/O (port)
001: IRQ0 input (INTC)
010: POE0 input (port)
011: Setting prohibited
100: SCL0 I/O (IIC)
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
PB1 Mode
Selects the function of the PB1/A17 pin.
0: PB1 I/O (port)
1: A17 output (BSC)
PB0 Mode
Selects the function of the PB0/A16 pin.
0: PB0 I/O (port)
1: A16 output (BSC)

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