HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 414

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.
11.9
The port output enable (POE) can be used to establish a high-impedance state for high-current
pins, by changing the POE0 to POE3 pin input, depending on the output status of the high-current
pins (PE9/TIOC3B/SCK3/TRST*, PE11/TIOC3D/RXD3/TDO*, PE12/TIOC4A/TXD3/TCK*,
PE13/TIOC4B/MRES, PE14/TIOC4C/DACK0, PE15/TIOC4D/DACK1/IRQOUT). It can also
simultaneously generate interrupt requests.
The high-current pins can also be set to high-impedance regardless of whether these pin functions
are selected in cases such as when the oscillator stops or in software standby mode. For details,
refer to section 17.1.11, High-Current Port Control Register (PPCR).
However, when using the E10A, the high-impedance function is disabled when an oscillation stop
is detected, port output enable (POE), or in the software standby state for the three pins of
PE9/TIOC3B/SCK3/TRST, PE11/TIOC3D/RXD3/TDO, and PE12/TIOC4A/TXD3/TCK of the
SH7145.
Note: * Only in the SH7145.
11.9.1
• Each of the POE0 to POE3 input pins can be set for falling edge, Pφ/8 × 16, Pφ/16 × 16, or
• High-current pins can be set to high-impedance state by POE0 to POE3 pin falling-edge or
• High-current pins can be set to high-impedance state when the high-current pin output levels
• Interrupts can be generated by input-level sampling or output-level comparison results.
Rev.4.00 Mar. 27, 2008 Page 368 of 882
REJ09B0108-0400
Pφ/128 × 16 low-level sampling.
low-level sampling.
are compared and simultaneous low-level output continues for one cycle or more.
Multi-Function Timer Pulse Unit (MTU)
Port Output Enable (POE)
Features