HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 651

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.1.3
The port B I/O register (PBIOR) is a 16-bit readable/writable register that is used to set the pins on
port B as inputs or outputs. Bits PB9IOR to PB0IOR correspond to pins PB9 to PB0 (names of
multiplexed pins are here given as port names and pin numbers alone). PBIOR is enabled when
port B pins are functioning as general-purpose inputs/outputs (PB9 to PB0). In other states,
PBIOR is disabled.
A given pin on port B will be an output pin if the corresponding bit in PBIOR is set to 1, and an
input pin if the bit is cleared to 0.
Bits 15 to 10 are reserved. These bits are always read as 0. The write value should always be 0.
The initial value of PBIOR is H'0000.
17.1.4
The port B control registers 1 and 2 (PBCR1 and PBCR2) are 16-bit readable/writable registers
that are used to select the multiplexed pin function of the pins on port B.
Port B I/O Register (PBIOR)
Port B Control Registers 1, 2 (PBCR1, PBCR2)
Rev.4.00 Mar. 27, 2008 Page 605 of 882
17. Pin Function Controller (PFC)
REJ09B0108-0400