HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 197

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Bit
2
1
0
Bit Name Initial Value R/W
SW2
SW1
SW0
1
1
1
R/W
R/W
R/W
Description
CS assert period extension for CS2 and CS6 spaces
This bit inserts a cycle to prevent the assert period of RD
and WRx from extending the assert period of CS2 and
CS6.
0: No cycle inserted for CS assert period for CS2 and CS6
1: CS assert extension for CS2 and CS6 spaces.
CS assert period extension for CS1 and CS5 spaces
This bit inserts a cycle to prevent the assert period of RD
and WRx from extending the assert period of CS1 and
CS5.
0: No cycle inserted for CS assert period for CS1 and CS5
1: CS assert extension for CS1 and CS5 spaces.
CS assert period extension for CS0 and CS4 spaces
This bit inserts a cycle to prevent the assert period of RD
and WRx from extending the assert period of CS0 and
CS4.
0: No cycle inserted for CS assert period for CS0 and CS4
1: CS assert extension for CS0 and CS4 spaces.
spaces.
spaces.
spaces.
(Each one cycle inserted before and after the bus cycle)
(Each one cycle inserted before and after the bus cycle)
(Each one cycle inserted before and after the bus cycle)
Rev.4.00 Mar. 27, 2008 Page 151 of 882
9. Bus State Controller (BSC)
REJ09B0108-0400

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