HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 224

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10. Direct Memory Access Controller (DMAC)
10.3.5
The DMAOR is a 16-bit readable/writable register that specifies the transfer mode of the DMAC
Bit
15 to 10 ⎯
9
8
7 to 3
2
Rev.4.00 Mar. 27, 2008 Page 178 of 882
REJ09B0108-0400
Bit Name Initial Value R/W
PR1
PR0
⎯
AE
DMAC Operation Register (DMAOR)
All 0
0
0
All 0
0
R
R/W
R/W
R
R/(W)*
Reserved
These bits are always read as 0. The write value
should always be 0.
Priority Mode 1 and 0
These bits determine the priority level of channels for
execution when transfer requests are made for
several channels simultaneously.
00: CH0 > CH1 > CH2 > CH3
01: CH0 > CH2 > CH3 > CH1
10: CH2 > CH0 > CH1 > CH3
11: Round robin mode
Reserved
These bits are always read as 0. The write value
should always be 0.
Address Error Flag
Indicates that an address error has occurred during
DMA transfer. If this bit is set during a data transfer,
transfers on all channels are suspended. The CPU
cannot write a 1 to the AE bit. Clearing is effected by
0 write after 1 read.
0: No address error, DMA transfer enabled
[Clearing condition]
Write AE = 0 after reading AE = 1
1: Address error, DMA transfer disabled
[Setting condition]
Address error due to DMAC
Description