M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 101

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
10.3 Hardware Interrupts
Hardware interrupts are classified into two types — special interrupts and peripheral function interrupts.
10.3.1 Special Interrupts
10.3.2 Peripheral Function Interrupts
10.3.1.1 NMI Interrupt
10.3.1.2 DBC Interrupt
10.3.1.3 Watchdog Timer Interrupt
10.3.1.4 Oscillation Stop and Re-oscillation Detection Interrupt
10.3.1.5 Single-Step Interrupt
10.3.1.6 Address Match Interrupt
The peripheral function interrupt is generated when a request from the peripheral functions in the MCU is
acknowledged. The peripheral function interrupt is a maskable interrupt. See Table 10.2 Relocatable
Vector Tables about how the peripheral function interrupt occurs. Refer to the descriptions of each
function for details.
Special interrupts are non-maskable interrupts.
An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details,
refer to 10.7 NMI Interrupt.
Do not normally use this interrupt because it is provided exclusively for use by development tools.
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize the
watchdog timer. For details about the watchdog timer, refer to 11. Watchdog Timer.
Generated by the oscillation stop and re-oscillation detection function. For details about the oscillation
stop and re-oscillation detection function, refer to 8. Clock Generation Circuit.
Do not normally use this interrupt because it is provided exclusively for use by development tools.
An address match interrupt is generated immediately before executing the instruction at the address
indicated by registers RMAD0 to RMAD3 that corresponds to one of the AIER0 or AIER1 bit in the AIER
register or the AIER20 or AIER21 bit in the AIER2 register which is 1 (address match interrupt enabled).
For details, refer to 10.10 Address Match Interrupt.
Apr 14, 2006
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10. Interrupts