M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 136

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 13.2 Event Counter Mode Specifications (when not using two-phase pulse signal processing)
i = 0 to 4
j = i - 1, except j = 4 if i = 0
k = i + 1, except k = 0 if i = 4
Count source
Count operation
Divided ratio
Count start condition
Count stop condition
Interrupt request generation timing Timer overflow or underflow
TAiIN pin function
TAiOUT pin function
Read from timer
Write to timer
Select function
13.1.2 Event Counter Mode
In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers. Timers A2, A3, and A4 can count two-phase external signals. Table 13.2 lists the Event
Counter Mode Specifications (when not using two-phase pulse signal processing). Figure 13.8 shows
TAiMR Register in Event Counter Mode (when not using two-phase pulse signal processing). Table 13.3
lists the Event Counter Mode Specifications (when using two-phase pulse signal processing with timers
A2, A3, and A4). Figure 13.9 shows Registers TA2MR to TA4MR in Event Counter Mode (when using
two-phase pulse signa processing with timers A2, A3, and A4).
Apr 14, 2006
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page 112 of 376
• External signals input to TAiIN pin (effective edge can be selected in program)
• Timer B2 overflows or underflows,
• Up-count or down-count can be selected by external signal or program
• When the timer overflows or underflows, it reloads the reload register
1/ (FFFFh - n + 1) for up-count
1/ (n + 1) for down-count
Set the TAiS bit in the TABSR register to 1 (count starts)
Set the TAiS bit to 0 (count stops)
I/O port or count source input
I/O port, pulse output, or up/down-count select input
Count value can be read by reading the TAi register
• When not counting and until the 1st count source is input after counting start
• When counting (after 1st count source input)
• Free-run count function
• Pulse output function
Timer Aj overflows or underflows,
Timer Ak overflows or underflows
contents and continues counting. When operating in free-running mode,
the timer continues counting without reloading.
Value written to the TAi register is written to both reload register and counter
Value written to the TAi register is written to only reload register
(Transferred to counter when reloaded next)
Even when the timer overflows or underflows, the reload register content
is not reloaded to it
Whenever the timer underflows or underflows, the output polarity of
TAiOUT pin is inverted.
When TAiS bit is set to 0 (count stops), the pin outputs a low.
n : set value of the TAi register 0000h to FFFFh
Specification
13. Timers