M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 279

IC M16C/6N4 MCU FLASH 100-LQFP

M306N4FGGP#U3

Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
21.3 CPU Rewrite Mode
Table 21.3 EW0 Mode and EW1 Mode
NOTES:
Operating mode
Space where rewrite
control program can be
placed
Space where rewrite
control program can be
executed
Space which can be
rewritten
Software command
restriction
Modes after program or
erasing
CPU status during
auto-programming and
auto-erasure
Flash memory status
detection
In CPU rewrite mode, the user ROM area can be rewritten when the CPU executes software commands.
The user ROM area can be rewritten with the MCU is mounted on a board without using a parallel, serial or
CAN programmer.
In CPU rewrite mode, only the user ROM area shown in Figure 21.1 can be rewritten. The boot ROM area
cannot be rewritten. Program and the block erase command are executed only in the user ROM area.
Erase-write 0 (EW0) mode and erase-write 1 (EW1) mode are provided as CPU rewrite mode.
Table 21.3 lists the differences between EW0 and EW1 Modes.
1.
2. When in CPU rewrite mode, bits PM10 and PM13 in the PM1 register are set to 1. The rewrite control
Do not generate an interrupts (except NMI interrupt) and DMA transfer.
program can only be executed in the internal RAM or in an external area that is enabled for use when
the PM13 bit = 1.
Apr 14, 2006
Item
page 255 of 376
Operating
• Single-chip mode
• Memory expansion mode
• Boot mode
• User ROM area
• Boot ROM area
transferred to any space other than the executed in the user ROM area
flash memory (e.g., RAM) before being
executed
User ROM area
None
Read status register mode
•Read bits FMR00, FMR06, and FMR07 Read bits FMR00, FMR06, and FMR07
•Execute the read status register
The rewrite control program must be The rewrite control program can be
command to read bits SR7, SR5, and
SR4 in the status register
in the FMR0 register by program
(2)
EW0 Mode
_______
Maintains hold state (I/O ports maintains
User ROM area
User ROM area
• Program and block erase commands
• Erase all unlocked block command
• Read status register command cannot
Read array mode
the state before the command was
in the FMR0 register by program
Single-chip mode
executed)
However, this excludes blocks with the
rewrite control program
the rewrite control program.
cannot be executed when the lock bit in
a block having the rewrite control program
is set to 1 (unlocked) or when the FMR02
bit in the FMR0 register is set to 1 (lock
bit disabled).
be used.
cannot be executed in a block having
(1)
EW1 Mode
21. Flash Memory Version

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