M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 154

IC M16C/6N4 MCU FLASH 100-LQFP

M306N4FGGP#U3

Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
14. Three-Phase Motor Control Timer Function
Timers A1, A2, A4, and B2 can be used to output three-phase motor drive waveforms. Table 14.1 lists the
Three-phase Motor Control Timer Function Specifications. Figure 14.1 shows the Three-phase Motor Control
Timer Function Block Diagram. Figures 14.2 to 14.8 shows the Three-phase Motor Control Timer Function
related registers.
Table 14.1 Three-Phase Motor Control Timer Function Specifications
NOTE:
Related pins: • P7_2/CLK2/TA1OUT/V
Three-Phase waveform output pin
Forced cutoff input
Used timers
Output waveform
Carrier wave cycle
Three-Phase PWM output width
Dead time
Active level
Positive and negative-phase concurrent
active disable function
Interrupt frequency
1.
Forced cutoff with NMI input is effective when the IVPCR1 bit in the TB2SC register is set to 1 (three-phase
output forcible cutoff by NMI input enabled). If an “L” signal is applied to the NMI pin when the IVPCR1
bit is 1, the related pins go to a high-impedance state regardless of which functions of those pins are
being used.
Apr 14, 2006
• P7_3/CTS2/RTS2/TA1IN/V
• P7_4/TA2OUT/W
• P7_5/TA2IN/W
• P8_0/TA4OUT/U
• P8_1/TA4IN/U
Item
(1)
page 130 of 376
_________ _________
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Six pins (U, U, V, V, W, W)
Input “L” to NMI pin
Timer A4, A1, A2 (used in the one-shot timer mode)
Timer B2 (used in the timer mode)
Dead time timer (3 eight-bit timer and shared reload register)
Sawtooth wave modulation: count source ✕ (m+1)
m: Setting value of the TB2 register, 0000h to FFFFh
Count source: f1, f2, f8, f32, fC32
Triangular wave modulation: count source ✕ n ✕ 2
Sawtooth wave modulation: count source ✕ n
Count source: f1, f2, f8, f32, fC32
Count source ✕ p, or no dead time
Count source: f1, f2, f1 divided by 2, f2 divided by 2
Positive and negative-phases concurrent active disable function
through 15 times carrier wave cycle-to-cycle basis
Triangular wave modulation, Sawtooth wave modification
Triangular wave modulation: count source ✕ (m+1) ✕ 2
Enable to select “H” or “L”
Positive and negative-phases concurrent active detect function
For timer B2 interrupt, select a carrier wave cycle-to-cycle basis
• Timer A4: U- and U-phase waveform control
• Timer A1: V- and V-phase waveform control
• Timer A2: W- and W-phase waveform control
• Carrier wave cycle control
• Dead time control
• Enable to output “H” or “L” for one cycle
• Enable to set positive-phase level and negative-phase level respectively
n: Setting value of registers TA4, TA1, and TA2 (of registers
TA4, TA41, TA1, TA11, TA2, and TA21 when setting the INV11
bit to 1), 0001h to FFFFh
p: Setting value of the DTT register, 01h to FFh
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14. Three-Phase Motor Control Timer Function
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Specification
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