M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 293

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
21.3.6 Data Protect Function
21.3.7 Status Register (SRD Register)
Each block in the flash memory has a nonvolatile lock bit. The lock bit is enabled by setting the FMR02 bit
in the FMR0 register to 0 (lock bit enabled). The lock bit allows each block to be individually protected
(locked) against program and erase. This helps prevent data from being inadvertently written to or erased
from the flash memory.
• When the lock bit status is set to 0, the block is locked (block is protected against program and erase).
• When the lock bit status is set to 1, the block is not locked (block can be programmed or erased).
The lock bit status is set to 0 (locked) by executing the lock bit program command and to 1 (unlocked) by
erasing the block. The lock bit status cannot be set to 1 by any commands.
The lock bit status can be read by the read lock bit status command.
The lock bit function is disabled by setting the FMR02 bit to 1 (lock bit disabled). All blocks are unlocked.
However, individual lock bit status remains unchanged. The lock bit function is enabled by setting the
FMR02 bit to 0. Lock bit status is retained.
If the block erase or erase all unlocked block command is executed while the FMR02 bit is set to 1, the
target block or all blocks are erased regardless of lock bit status. The lock bit status of each block are set
to 1 after an erase operation is completed.
Refer to 21.3.5 Software Commands for details on each command.
The status register indicates the operating status of the flash memory and whether or not an erase or
program operation is completed as expected. Bits FMR00, FMR06, and FMR07 in the FMR0 register
indicate status register states.
Table 21.5 shows the Status Register.
In EW0 mode, the status register can be read when the followings occur.
• Given even address in the user ROM area is read after writing the read status register command.
• Given even address in the user ROM area is read from when the program, block erase, erase all
21.3.7.1 Sequencer Status (Bits SR7 and FMR00)
21.3.7.2 Erase Status (Bits SR5 and FMR07)
21.3.7.3 Program Status (Bits SR4 and FMR06)
The sequencer status indicates the operating status of the flash memory. It is set to 0 while the program,
block erase, erase all unlocked block, lock bit program, or read lock bit status command is being
executed; otherwise, it is set to 1.
Refer to 21.3.8 Full Status Check.
Refer to 21.3.8 Full Status Check.
unlocked block, or lock bit program command is executed until when the read array command is
executed.
Apr 14, 2006
page 269 of 376
21. Flash Memory Version