M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 238

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
19. CAN Module
The CAN (Controller Area Network) module for the M16C/6N Group (M16C/6N4) of MCUs is a communication
controller implementing the CAN 2.0B protocol. The M16C/6N Group (M16C/6N4) contains two CAN modules
which can transmit and receive messages in both standard (11-bit) ID and extended (29-bit) ID formats.
Figure 19.1 shows the CAN Module Block Diagram.
External CAN bus driver and receiver are required.
Figure 19.1 CAN Module Block Diagram
CTX/CRX:
Protocol controller:
Message box:
Acceptance filter:
16 bit timer:
Wake-up function:
Interrupt generation function: The interrupt requests are generated by the CAN module. CANi successful reception
Apr 14, 2006
CTX
CRX
i = 0, 1
j = 0 to 15
Wake-up
function
CiCONR register
CiRECR register
CiTECR register
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controller
Protocol
This memory block consists of 16 slots that can be configured either as transmitter
CAN0/1 wake-up interrupt request is generated by a message from the CAN bus.
CAN I/O pins.
This controller handles the bus arbitration and the CAN protocol services, i.e. bit
timing, stuffing, error status etc.
or receiver. Each slot contains an individual ID, data length code, a data field
(8 bytes), and a time stamp.
This block performs filtering operation for received messages. For the filtering
operation, the CiGMR register (i = 0, 1), the CiLMAR register, or the CiLMBR
register is used.
Used for the time stamp function. When the received message is stored in the
message memory, the timer value is stored as a time stamp.
interrupt, CANi successful transmission interrupt, CAN0/1 error interrupt, and
CAN0/1 wake-up interrupt.
CiSTR register
CiCTLR register
CiSSTR register
CiMCTLj register
Data bus
Data bus
Acceptance filter
CiTSR register
slots 0 to 15
16 bit timer
CiLMAR register
CiLMBR register
CiGMR register
CiICR register
Message data
generation
Message box
CiIDR register
slots 0 to 15
Interrupt
function
Message ID
Time stamp
DLC
CANi successful transmission int
CAN0/1 wake-up int
CANi successful reception int
CAN0/1 error int
19. CAN Module