M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 254

IC M16C/6N4 MCU FLASH 100-LQFP

M306N4FGGP#U3

Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
19.9 Acceptance Filtering Function and Masking Function
Figure 19.16 Correspondence of Mask Registers to Slots
Figure 19.17 Acceptance Function
These functions serve the users to select and receive a facultative message. Registers CiGMR (i = 0, 1),
CiLMAR, and CiLMBR can perform masking to the standard ID and the extended ID of 29 bits. The CiGMR
register corresponds to slots 0 to 13, the CiLMAR register corresponds to slot 14, and the CiLMBR register
corresponds to slot 15. The masking function becomes valid to 11 bits or 29 bits of a received ID according
to the value in the corresponding slot of the CiIDR register upon acceptance filtering operation. When the
masking function is employed, it is possible to receive a certain range of IDs.
Figure 19.16 shows the Correspondence of Mask Registers to Slots, Figure 19.17 shows the Acceptance
Function.
When using the acceptance function, note the following points.
(1) When one ID is defined in two slots, the one with a smaller number alone is valid.
(2) When it is configured that slots 14 and 15 receive all IDs with Basic CAN mode, slots 14 and 15 receive
all IDs which are not stored into slots 0 to 13.
Apr 14, 2006
received message
ID of the
page 230 of 376
i = 0, 1
ID stored in
the slot
CiLMAR register
CiLMBR register
CiGMR register
The value of the
mask register
Slot #10
Slot #11
Slot #12
Slot #13
Slot #14
Slot #15
Slot #0
Slot #1
Slot #2
Slot #3
Slot #4
Slot #5
Slot #6
Slot #7
Slot #8
Slot #9
Mask Bit Values
0: ID (to which the received message
1: ID (to which the received message
Acceptance judge signal
0: The CAN module ignores the
1: The CAN module stores the
corresponds) match is handled as
"Don’t care".
corresponds) match is checked.
current incoming message.
(Not stored in any slot)
current incoming message in
a slot of which ID matches.
Acceptance Signal
19. CAN Module

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