M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 11

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

SFR Page Reference ............................................................................................................ B-1
1. Overview ............................................................................................................................... 1
2. Central Processing Unit (CPU) ........................................................................................... 12
3. Memory ............................................................................................................................... 14
4. Special Function Registers (SFRs) ..................................................................................... 15
5. Resets ................................................................................................................................. 31
6. Processor Mode .................................................................................................................. 34
7. Bus ...................................................................................................................................... 40
1.1 Applications .................................................................................................................................................. 1
1.2 Performance Overview ................................................................................................................................ 2
1.3 Block Diagram .............................................................................................................................................. 3
1.4 Product Information ...................................................................................................................................... 4
1.5 Pin Assignments .......................................................................................................................................... 5
1.6 Pin Functions ............................................................................................................................................... 9
2.1 Data Registers (R0, R1, R2, and R3) ........................................................................................................ 12
2.2 Address Registers (A0 and A1) .................................................................................................................. 12
2.3 Frame Base Register (FB) ......................................................................................................................... 13
2.4 Interrupt Table Register (INTB) .................................................................................................................. 13
2.5 Program Counter (PC) ............................................................................................................................... 13
2.6 User Stack Pointer (USP), Interrupt Stack Pointer (ISP) ........................................................................... 13
2.7 Static Base Register (SB) .......................................................................................................................... 13
2.8 Flag Register (FLG) ................................................................................................................................... 13
5.1 Hardware Reset ......................................................................................................................................... 31
5.2 Software Reset .......................................................................................................................................... 33
5.3 Watchdog Timer Reset ............................................................................................................................... 33
5.4 Oscillation Stop Detection Reset ............................................................................................................... 33
5.5 Internal Space ............................................................................................................................................ 33
6.1 Types of Processor Mode .......................................................................................................................... 34
6.2 Setting Processor Modes ........................................................................................................................... 34
7.1 Bus Mode ................................................................................................................................................... 40
2.8.1 Carry Flag (C Flag) ............................................................................................................................ 13
2.8.2 Debug Flag (D Flag) .......................................................................................................................... 13
2.8.3 Zero Flag (Z Flag) .............................................................................................................................. 13
2.8.4 Sign Flag (S Flag) .............................................................................................................................. 13
2.8.5 Register Bank Select Flag (B Flag) .................................................................................................... 13
2.8.6 Overflow Flag (O Flag) ....................................................................................................................... 13
2.8.7 Interrupt Enable Flag (I Flag) ............................................................................................................. 13
2.8.8 Stack Pointer Select Flag (U Flag) ..................................................................................................... 13
2.8.9 Processor Interrupt Priority Level (IPL) .............................................................................................. 13
2.8.10 Reserved Area ................................................................................................................................. 13
5.1.1 Reset on a Stable Supply Voltage ..................................................................................................... 31
5.1.2 Power-on Reset ................................................................................................................................. 31
7.1.1 Separate Bus ..................................................................................................................................... 40
7.1.2 Multiplexed Bus .................................................................................................................................. 40
Table of Contents
A-1