LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 524

IC ARM7 MCU ROMLESS 208TFBGA

LPC2460FET208,551

Manufacturer Part Number
LPC2460FET208,551
Description
IC ARM7 MCU ROMLESS 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2460FET208,551

Program Memory Type
ROMless
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4260
935283232551
LPC2460FET208-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2460FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10237_4
User manual
Fig 93. ID Look-up table configuration example (FullCAN activated and enabled)
SFF_GRP_sa =
EFF_GRP_sa =
ENDofTable =
SFF_sa
= 0x10
EFF_sa =
0x20
18.8 Look-up table programming guidelines
...
...
Message
Standard
Identifier
FullCAN
Section
Standard
Section
section
FullCAN
Identifier
Section
Explicit
Format
Frame
Object
Explicit
Format
Frame
All identifier sections of the ID Look-up Table have to be programmed in such a way, that
each active section is organized as a sorted list or table with an increasing order of the
Source CAN Channel (SCC) together with CAN Identifier in each section.
SCC value equals CAN_controller - 1, i.e., SCC = 0 matches CAN1 and SCC = 1
matches CAN2.
In cases, where a syntax error in the ID Look-up Table is encountered, the Look-up Table
address of the incorrect line is made available in the Look-up Table Error Address
Register (LUTerrAd).
The reporting process in the Look-up Table Error Address Register (LUTerrAd) is a
“run-time” process. Only those address lines with syntax error are reported, which were
passed through the acceptance filtering process.
The following general rules for programming the Look-up Table apply:
SCC
SCC
SCC
SCC
SCC
SCC
SCC
SCC
Disable bit
Message
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
Enable bit
FullCAN
Interrupt
Rev. 04 — 26 August 2009
10
12
14
0
2
4
6
8
No Message Data, disabled.
No Message Data, disabled.
No Message Data, disabled.
FF RTR SEM DLC CAN-ID
FF RTR SEM DLC CAN-ID
Index
RXDATA 4, 3, 2, 1
RXDATA 8, 7, 6, 5
RXDATA 4, 3, 2, 1
RXDATA 8, 7, 6, 5
ID18
ID18
ID18
ID18
ID18
ID18
ID18
ID18
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
SCC
SCC
SCC
SCC
SCC
SCC
SCC
SCC
Disable bit
Message
1
0
0
0
0
0
0
0
Chapter 18: LPC24XX CAN controllers CAN1/2
1
0
0
0
0
0
0
0
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
MSB
ID28
Enable bit
FullCAN
Interrupt
Disabled, 1
11
13
15
3
5
7
9
ID18
ID18
ID18
ID18
ID18
ID18
ID18
ID18
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
UM10237
© NXP B.V. 2009. All rights reserved.
Message Object
Message Object
Message Object
Data 0
Data 2
Data 1
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