LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 68

• Manufacturer Part Number: LPC2460FET208,551
• Description: IC ARM7 MCU ROMLESS 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2460FET208,551

• Program Memory Type: ROMless
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4260; 935283232551; LPC2460FET208-S

1. How to read this chapter
Table 64.
2. Basic configuration
UM10237_4
User manual
LPC2458
LPC2420,
LPC2460,
LPC2468,
LPC2470,
LPC2478
EMC configuration
Data bus
width/
memory
transaction
size
8-bit, 16-bit
8-bit, 16-bit,
32-bit
This chapter describes the external memory controller for all LPC2400 parts. For EMC
configurations that are specific to LPC2458 and LPC2420/60/68/70/78, see
The EMC is configured using the following registers:
1. Power: In the PCONP register
2. Clock: see
Pins
UM10237
Chapter 5: LPC24XX External Memory Controller (EMC)
Rev. 04 — 26 August 2009
A[19:0]
D[15:0]
OE, WE
BLS[1:0]
CS[1:0]
DYCS[1:0]
CAS, RAS
CLKOUT[1:0]
CKEOUT[1:0]
DQMOUT[1:0]
A[23:0]
D[31:0]
OE, WE
BLS[3:0]
CS[3:0]
DYCS[3:0]
CAS, RAS
CLKOUT[1:0]
CKEOUT[3:0]
DQMOUT[3:0]
Remark: The EMC is enabled on reset (PCEMC = 1). On POR and warm reset, the
EMC is enabled as well, see
Table
SDRAM configuration
registers
EMCDynamic Config1/0
EMCDynamic RasCas1/0
EMCDynamic
Config3/2/1/0
EMCDynamic
RasCas3/2/1/0
4–53.
Rev. 04 — 26 August 2009
Table 5–68
(Table
4–63), set bit PCEMC.
and
Static memory
configuration registers
EMCStatic Config1/0
EMCStatic WaitWen1/0
EMCStatic WaitOen1/0
EMCStatic WaitRd1/0
EMCStatic WaitPage1/0
EMCStatic WaitWr1/0
EMCStatic WaitTurn1/0
EMCStatic Config3/2/1/0
EMCStatic
WaitWen3/2/1/0
EMCStatic
WaitOen3/2/1/0
EMCStatic WaitRd3/2/1/0
EMCStatic
WaitPage3/2/1/0
EMCStatic WaitWr3/2/1/0
EMCStatic
WaitTurn3/2/1/0
Table
5–71.
© NXP B.V. 2009. All rights reserved.
External
memory
connection
Section
Section 5–11.3
Section
Section
Section 5–11.3
User manual
Table
5–11.2,
5–11.1,
5–11.2,
68 of 792
5–64.