LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 754
![IC ARM7 MCU ROMLESS 208TFBGA](/photos/12/32/123248/mfg_lpc24xx_sml.jpg)
LPC2460FET208,551
Manufacturer Part Number
LPC2460FET208,551
Description
IC ARM7 MCU ROMLESS 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2460FET208,551
Program Memory Type
ROMless
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4260
935283232551
LPC2460FET208-S
935283232551
LPC2460FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2460FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
Reset_Address
Undefined_Address
SWI_Address
Prefetch_Address
Abort_Address
FIQ_Address
AREA init_code, CODE
ram_end EQU 0x4000xxxx ; Top of on-chip RAM.
__init
; /*********************************************************************
; * Set up the stack pointers for various processor modes. Stack grows
; * downwards.
; *********************************************************************/
NOP ; Insert User code valid signature here.
LDR pc, [pc, #-0x120] ;Load IRQ vector from VIC
LDR PC, FIQ_Address
LDR
MRS r0, CPSR ;Save current processor mode
; Initialize the Undef mode stack for RealMonitor use
BIC
ORR
MSR
;Keep top 32 bytes for flash programming routines.
;Refer to Flash Memory System and Programming chapter
SUB
; Initialize the Abort mode stack for RealMonitor
BIC
ORR
MSR
;Keep 64 bytes for Undef mode stack
SUB
; Initialize the IRQ mode stack for RealMonitor and User
BIC
ORR
MSR
;Keep 32 bytes for Abort mode stack
SUB
; Return to the original mode.
MSR
; Initialize the stack for user application
; Keep 256 bytes for IRQ mode stack
SUB
r2, =ram_end ;Get top of RAM
r1, r0, #0x1f
r1, r1, #0x1b
CPSR_c, r1
sp,r2,#0x1F
r1, r0, #0x1f
r1, r1, #0x17
CPSR_c, r1
sp,r2,#0x5F
r1, r0, #0x1f
r1, r1, #0x12
CPSR_c, r1
sp,r2,#0x7F
CPSR_c, r0
sp,r2,#0x17F
Rev. 04 — 26 August 2009
DCD __init
DCD rm_undef_handler ;Provided by RealMonitor
DCD 0
DCD rm_prefetchabort_handler
DCD rm_dataabort_handler
DCD 0
;Reset Entry point
;User can put address of SWI handler here
;User can put address of FIQ handler here
Chapter 35: LPC24XX RealMonitor
;Provided by RealMonitor
;Provided by RealMonitor
UM10237
© NXP B.V. 2009. All rights reserved.
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