LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 744
![IC ARM7 MCU ROMLESS 208TFBGA](/photos/12/32/123248/mfg_lpc24xx_sml.jpg)
LPC2460FET208,551
Manufacturer Part Number
LPC2460FET208,551
Description
IC ARM7 MCU ROMLESS 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2460FET208,551
Program Memory Type
ROMless
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4260
935283232551
LPC2460FET208-S
935283232551
LPC2460FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2460FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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1. Features
2. Applications
3. Description
UM10237_4
User manual
3.1 ETM configuration
As the microcontroller has significant amounts of on-chip memories, it is not possible to
determine how the processor core is operating simply by observing the external pins. The
ETM provides real-time trace capability for deeply embedded processor cores. It outputs
information about processor execution to a trace port. A software debugger allows
configuration of the ETM using a JTAG interface and displays the trace information that
has been captured, in a format that a user can easily understand.
The ETM is connected directly to the ARM core and not to the main AMBA system bus. It
compresses the trace information and exports it through a narrow trace port. An external
Trace Port Analyzer captures the trace information under software debugger control.
Trace port can broadcast the Instruction trace information. Instruction trace (or PC trace)
shows the flow of execution of the processor and provides a list of all the instructions that
were executed. Instruction trace is significantly compressed by only broadcasting branch
addresses as well as a set of status signals that indicate the pipeline status on a cycle by
cycle basis. Trace information generation can be controlled by selecting the trigger
resource. Trigger resources include address comparators, counters and sequencers.
Since trace information is compressed the software debugger requires a static image of
the code being executed. Self-modifying code can not be traced because of this
restriction.
The following standard configuration is selected for the ETM macrocell.
Table 679. ETM configuration
Resource number/type
Pairs of address comparators
Data Comparators
Memory Map Decoders
Counters
Sequencer Present
•
•
•
•
•
•
UM10237
Chapter 34: LPC24XX Embedded Trace Module (ETM)
Rev. 04 — 26 August 2009
Closely track the instructions that the ARM core is executing.
One external trigger input.
10 pin interface.
All registers are programmed through JTAG interface.
Does not consume power when trace is not being used.
THUMB instruction set support.
Rev. 04 — 26 August 2009
Small
1
0 (Data tracing is not supported)
4
1
No
[1]
© NXP B.V. 2009. All rights reserved.
User manual
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