LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 634

• Manufacturer Part Number: LPC2460FET208,551
• Description: IC ARM7 MCU ROMLESS 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2460FET208,551

• Program Memory Type: ROMless
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4260; 935283232551; LPC2460FET208-S

NXP Semiconductors
UM10237_4
User manual
Fig 132. PWM block diagram
MATCH REGISTER 0
MATCH REGISTER 1
MATCH REGISTER 2
MATCH REGISTER 3
MATCH REGISTER 4
MATCH REGISTER 5
MATCH REGISTER 6
CAPTURE CONTROL REGISTER
MATCH CONTROL REGISTER
TIMER CONTROL REGISTER
disable
LOAD ENABLE REGISTER
master
M[6:0]
INTERRUPT
CAPTURE[1:0]
STOP ON MATCH
RESET ON MATCH
LOAD[1:0]
INTERRUPT REGISTER
CAPTURE REGISTER 0
CAPTURE REGISTER 1
RESERVED
RESERVED
CONTROL
reset
SHADOW REGISTER 0
LOAD ENABLE
SHADOW REGISTER 1
LOAD ENABLE
SHADOW REGISTER 2
LOAD ENABLE
SHADOW REGISTER 3
LOAD ENABLE
SHADOW REGISTER 4
LOAD ENABLE
SHADOW REGISTER 5
LOAD ENABLE
SHADOW REGISTER 6
LOAD ENABLE
CLEAR
enable
Match0
Rev. 04 — 26 August 2009
Chapter 25: LPC24XX Pulse Width Modulator PWM0/PWM1
CSN
=
=
=
PRESCALE REGISTER
PRESCALE COUNTER
MAXVAL
TIMER COUNTER
=
=
CE
TCI
=
=
PWMENA1..6
PWM CONTROL REGISTER
Match 2
Match 3
Match 0
Match 1
Match 4
Match 5
Match 6
MUX
MUX
MUX
MUX
MUX
UM10237
© NXP B.V. 2009. All rights reserved.
R
R
R
R
R
R
S
S
S
S
S
S
PWMSEL2..6
PWMSEL5
PWMSEL4
PWMSEL6
PWMSEL2
PWMSEL3
EN
EN
EN
EN
EN
EN
Q
Q
Q
Q
Q
Q
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWMENA1
PWMENA2
PWMENA3
PWMENA4
PWMENA5
PWMENA6
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