UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1001
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
20.11.3 Example of using power saving modes
consumption. By using the power saving mode specific to the CAN module and the power saving mode specific to the
CPU in combination, the CPU can be woken up from the power saving status by the CAN bus.
saving mode. If an edge transition from recessive to dominant is detected at the CRXD0 signal in this status, the CINTS5
bit in the CAN module is set to 1. If the C0CTRL.CIE5 bit is set to 1, a wakeup interrupt (INTC0WUP) is generated. The
CAN module is automatically released from the CAN sleep mode (PSMODE1, PSMODE0 bits = 00B) and returns to
normal operation mode (while the CAN clock is supplied, however, the PSMODE0 must be cleared by software after a bus
level change is detected at the CAN reception pin (CRXD0).). The CPU, in response to INTC0WUP, can release its own
power saving mode and return to normal operation mode.
tuned off. In this case, the operating clock supplied to the CAN module is turned off after the CAN module is put in the
CAN sleep mode. Then the CPU enters a power saving mode in which the clock supplied to the CPU is turned off. If an
edge transition from recessive to dominant is detected at the CRXD0 signal in this status, the CAN module can set the
CINTS5 bit to 1 and generate a wakeup interrupt (INTC0WUP) even if it is not supplied with a clock. The other functions,
however, do not operate because the clock supply to the CAN module is shut off, and the module remains in the CAN
sleep mode. The CPU, in response to INTC0WUP, releases its power saving mode, resumes supply of the internal clocks,
including the clock to the CAN module, after oscillation stabilization time has elapsed, and starts instruction execution. The
CAN module is immediately released from the CAN sleep mode when the clock supply is resumed, and returns to normal
operation mode (PSMODE1, PSMODE0 bits = 00B).
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
In some application systems, it may be necessary to place the CPU in a power saving mode to reduce the power
Here is an example of using the power saving modes.
First, put the CAN module in the CAN sleep mode (PSMODE1, PSMODE0 bits = 01B). Next, put the CPU in the power
To further reduce the power consumption of the CPU, the internal clocks, including that of the CAN module, may be
CHAPTER 20 CAN CONTROLLER
Page 1001 of 1509
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