UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 365

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Operation timing in external event count mode
Cautions 1. In the external event count mode, do not set the TABnCCR0 register to 0000H.
(a) Operation if TABnCCR0 register is set to FFFFH
If the TABnCCR0 register is set to FFFFH, the 16-bit counter counts to FFFFH each time the valid edge of the
external event count signal has been detected. The 16-bit counter is cleared to 0000H in synchronization with
the next count-up timing, and the INTTABnCC0 signal is generated. At this time, the TABnOPT0.TABnOVF bit
is not set.
Remark
2. In the external event count mode, use of the timer output is disabled. If performing timer
INTTABnCC0 signal
TABnCCR0 register
output using external event count input, set the interval timer mode, and select the operation
enabled by the external event count input for the count clock (TABnCTL1.TABnMD2 to
TABnCTL1.TABnMD0 bits = 000, TABnCTL1.TABnEEE bit = 1).
n = 0, 1
16-bit counter
TABnCE bit
FFFFH
0000H
External event
count signal
interval
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
External event
count signal
interval
FFFFH
External event
count signal
interval
Page 365 of 1509

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