UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 756
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(4) Baud rate
The baud rate is obtained by the following equation.
The baud rate error is obtained by the following equation.
When using the internal clock, the equation will be as follows (when using the ASCKC0 pin as clock at
UARTC0, calculate using the above equation).
Remark
When using the internal clock, the equation will be as follows (when using the ASCKC0 pin input as the
clock for UARTC0, calculate the baud rate error using the above equation).
Cautions 1. The baud rate error during transmission must be within the error tolerance on the
Baud rate =
Baud rate =
f
f
m = Value set using the UCnCTL1.UCnCKS3 to UCnCTL1.UCnCKS0 bits (m = 0 to 10)
k = Value set using the UCnCTL2.UCnBRS7 to UCnCTL2.UCnBRS0 bits (k = 4 to 255)
Error (%) =
Error (%) =
2. The baud rate error during reception must satisfy the range indicated in (5) Allowable
UCLK
XX
: Main clock frequency
receiving side.
baud rate range during reception.
= Frequency of base clock selected by the UCnCTL1.UCnCKS3 to UCnCTL1.UCnCKS0 bits
=
f
2 × k
UCLK
Actual baud rate (baud rate with error)
2
2 × k × Target baud rate
2
Target baud rate (correct baud rate)
m+1
m+1
f
XX
× k
× k × Target baud rate
[bps]
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
[bps]
f
UCLK
f
XX
− 1 × 100 [%]
− 1 × 100 [%]
− 1 × 100 [%]
Page 756 of 1509
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