UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 603

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
11.4.3 Interrupt culling function
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
• The interrupts to be culled are INTTAB1CC0 (crest interrupt) and INTTAB1OV (valley interrupt).
• The TAB1OPT1.TAB1ICE bit is used to enable output of the INTTAB1CC0 interrupt and the number of times the
• The TAB1OPT1.TAB1IOE bit is used to enable output of the INTTAB1OV interrupt and the number of times the
• The TAB1OPT1.TAB1ID4 to TAB1OPT1.TAB1ID0 bits are used to specify the number of counts by which a specified
• The TAB1OPT2.TAB1RDE bit is used to specify whether transfer is to be culled or not.
• The TAB1OPT0.TAB1CMS bit is used to specify whether the registers with a transfer function are batch rewritten or
interrupt is to be culled.
interrupt is to be culled.
interrupt is to be culled. The interrupt is masked for the duration of the specified number of counts and is generated
at the next interrupt timing.
If it is specified that transfer is to be culled, transfer is executed at the same timing as the interrupt output after culling.
If it is specified that transfer is not to be culled, transfer is executed at the transfer timing after the TAB1CCR1 register
has been written.
anytime rewritten.
The values of the registers are updated in synchronization with transfer when the TAB1CMS bit is 0. When the
TAB1CMS bit is 1, the values of the registers are immediately updated when a new value is written to the registers.
Transfer is performed from the TAB1CCRm register to the CCRm buffer register in synchronization with the interrupt
culling timing.
Cautions 1. When using the interrupt culling function in the batch rewrite mode (transfer mode), execute the
Remark
2. The interrupt is generated at the timing after culling.
m = 1 to 3
function in the intermittent batch rewrite mode (transfer culling mode).
CHAPTER 11 MOTOR CONTROL FUNCTION
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