UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 389

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
<1> Count operation start flow
TABnCCR0 to TABnCCR3 registers
(TABnCKS0 to TABnCKS2 bits),
Remark
Register initial setting
TABnCTL1 register,
TABnIOC0 register,
TABnIOC2 register,
TABnCTL0 register
TABnCE bit = 1
START
m = 0 to 3,
n = 0, 1
Figure 8-23. Software Processing Flow in One-Shot Pulse Output Mode (2/2)
The initial setting of these
registers is performed
before setting the
TABnCE bit to 1.
The TABnCKS0 to
TABnCKS2 bits can be
set at the same time
when counting has been
started (TABnCE bit = 1).
Trigger wait status
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
<2> TABnCCR0 to TABnCCR3 register setting change flow
<3> Count operation stop flow
Setting of TABnCCR0 to
TABnCCR3 registers
TABnCE bit = 0
STOP
Count operation is
stopped
As rewriting the
TABnCCRm register
immediately sends the
data to the CCRm
buffer register, rewriting
immediately after
the generation of the
INTTABnCCR0 signal
is recommended.
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