UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 593

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Cautions 1. Set the value “M” of the TAB1CCR0 register in a range of 0002H ≤ M ≤ FFFEH in the 6-phase
Dead-time
counter 1
Dead-time
counter 2
Dead-time
counter 3
TAB1CCR0
register
TAB1CCR1
register
TAB1CCR2
register
TAB1CCR3
register
TOAB11 signal
(internal signal)
TOAB12 signal
(internal signal)
TOAB13 signal
(internal signal)
TAB1DTC
register
TOAB10
pin output
TOAB1T1
pin output (U)
TOAB1B1
pin output (U)
TOAB1T2
pin output (V)
TOAB1B2
pin output (V)
TOAB1T3
pin output (W)
TOAB1B3
pin output (W)
2. Only a value of up to “M + 1” can be set to the TAB1CCR1, TAB1CCR2, and TAB1CCR3
3. The output is 100% if “0000H” is set to the TAB1CCR1, TAB1CCR2, and TAB1CCR3
4. If the operation value of an equation (such as (M + 1 – i) × 2 – N) of the output width of
16-bit
counter
0000H
PWM output mode.
registers.
registers. The output is 0% if “M + 1” is set to the TAB1CCR1, TAB1CCR2, and TAB1CCR3
registers.
The output (duty 50%) rises at the crest (M + 1) of the 16-bit counter and falls at the valley
(0000H) if “M + 2” or higher is set to the TAB1CCR1, TAB1CCR2, and TAB1CCR3 registers.
phases U, V, and W is 0 or lower, it is converged to 0 (100% output). If the operation value is
higher than “(M + 1) × 2”, it is converged to (M + 1) × 2 (0% output).
M
i
j
k
N
i
(phase U data)
(phase V data)
(phase W data)
(dead-time value)
(carrier data)
Figure 11-6. Timing Chart of 6-Phase PWM Output Mode
j
k
M + 1
k
Basic phase W output width = (M + 1
Phase W output width = (M + 1
Phase W output width = (M + 1
j
Phase V output width = (M + 1
Basic phase V output width = (M + 1
Phase V output width = (M + 1
i
Phase U output width = (M + 1
Basic phase U output width = (M + 1
CHAPTER 11 MOTOR CONTROL FUNCTION
Phase U output width = (M + 1
Dead-time width = N
Carrier cycle = (M + 1)
i
−
j
k)
−
×
−
k)
2
k)
−
×
−
j)
×
2 + N
N
k
×
2
−
2
M + 1
×
j)
−
−
2
−
×
j)
N
i)
2 + N
×
×
2
−
k
2
i)
-
−
i)
×
N
´
2 + N
2
j
i
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