UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 464
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 464 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Anytime write and batch write
The TT0CCR0 and TT0CCR1 registers in TMT0 can be rewritten during timer operation (TT0CTL0.TT0CE bit = 1),
but the write method (anytime write, batch write) of the CCR0 and CCR1 buffer registers differs depending on the
mode.
(a) Anytime write
In this mode, data is transferred at any time from the TT0CCR0 and TT0CCR1 registers to the CCR0 and
CCR1 buffer registers during timer operation (n = 0, 1).
• Set values to TT0CCRn register
• Timer operation enable
→
Note The 16-bit counter is not cleared upon a match between the 16-bit counter value
Remarks 1. The above flowchart illustrates an example of the operation in the interval
Timer operation
•
•
•
Figure 9-3. Flowchart of Basic Operation for Anytime Write
(TT0CE bit = 1)
→
Transfer to CCRn buffer register
Match between 16-bit counter
and CCR1 buffer register
Match between 16-bit counter
and CCR0 buffer register
16-bit counter clear & start
TTnCCRn register rewrite
Transfer values of TT0CCRn
register to CCRn buffer
register
and the CCR1 buffer register value. It is cleared upon a match between the 16-bit
counter value and the CCR0 buffer register value.
Initial settings
2. n = 0, 1
START
timer mode.
Note
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
IINTTT0CC0 signal output
IINTTT0CC1 signal output
Page 464 of 1509
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