UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 915

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Remark
Sync segment
(Synchronization segment)
Prop segment
(Propagation segment)
Phase segment 1
(Phase buffer segment 1)
Phase segment 2
(Phase buffer segment 2)
SJW
(reSynchronization Jump
Width)
Remark
Segment name
The CAN protocol specification defines the segments constituting the data bit time as shown in Figure 20-19.
IPT: Information Processing Time
TQ: Time Quanta
Figure 20-19. Configuration of Data Bit Time Defined by CAN Specification
Sync segment
1
Programmable to 1 to 8,
or greater
Programmable to 1 to 8
Phase segment 1 or IPT,
whichever greater
Programmable from 1TQ
to segment 1TQ to 4TQ,
whichever is smaller
Segment length
Prop segment
Data bit time (DBT)
Phase segment 1
This segment starts at the edge where the level changes
from recessive to dominant when hardware synchronization
is established.
This segment absorbs the delay of the output buffer, CAN
bus, and input buffer.
The length of this segment is set so that ACK is returned
before the start of phase segment 1.
Time of prop segment ≥ (Delay of output buffer) + 2 ×
(Delay of CAN bus) + (Delay of input buffer)
This segment compensates for an error in the data bit time.
The longer this segment, the wider the permissible range
but the slower the communication speed.
This width sets the upper limit of expansion or contraction
of the phase segment during resynchronization.
Sample point (SPT)
Phase segment 2
CHAPTER 20 CAN CONTROLLER
Description
SJW
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