UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 437

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) Edge detector
(5) Output controller
(6) Selector
(7) Counter control
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TT0CNT register.
When the TT0CTL0.TT0CE bit = 0, the value of the 16-bit counter is FFFFH. If the TT0CNT register is read at this
time, 0000H is read.
Reset sets the TT0CE bit to 0.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TT0CCR0 register is used as a compare register, the value written to the TT0CCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the CCR0
buffer register, a compare match interrupt request signal (INTTTCC00) is generated.
The CCR0 buffer register cannot be read or written directly.
The CCR0 buffer register is set to 0000H after reset, and the TT0CCR0 register is set to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TT0CCR1 register is used as a compare register, the value written to the TT0CCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the CCR1
buffer register, a compare match interrupt request signal (INTTTCC01) is generated.
The CCR1 buffer register cannot be read or written directly.
The CCR1 buffer register is set to 0000H after reset, and the TT0CCR1 register is set to 0000H.
This circuit detects the valid edges input to the TIT00, TIT01, EVTT0/TENC00, TENC01, and TECR0 pins. No edge,
rising edge, falling edge, or both the rising and falling edges can be selected as the valid edge by using the
TT0IOC1, TT0IOC2, and TT0IOC3 registers.
This circuit controls the output of the TOT00 and TOT01 pins via the TT0IOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event can
be selected as the count clock.
The count operation is controlled by the timer mode selected by the TT0CTL1 register.
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
Page 437 of 1509