EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 1079

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 28
768 KByte Flash Module (S12XFTM768K4V2)
28.1
The FTM768K4 module implements the following:
Freescale Semiconductor
Revision
Number
V02.09
V02.10
V02.11
768 Kbytes of P-Flash (Program Flash) memory, consisting of 4 physical Flash blocks, intended
primarily for nonvolatile code storage
Introduction
29 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
28.4.2/28-1115
28.4.2/28-1115
28.3.1/28-1084
28.3.2/28-1089
28.1/28-1079
28.4.2.12/28-
28.4.2.12/28-
28.4.2.12/28-
28.4.2.20/28-
28.6/28-1140
28.3.2.1/28-
28.4.2.4/28-
28.4.2.7/28-
28.3.2.1/28-
28.4.1.2/28-
Sections
Affected
1091
1118
1121
1125
1125
1125
1134
1091
1110
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 28-1. Revision History
- Cleanup
- Updated Command Error Handling tables based on parent-child relationship
with FTM1024K5
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash Memory Addressing table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
1079

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