EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 537

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.3.2.1
Read or write: Anytime
All bits reset to zero.
Freescale Semiconductor
TC1H (High)
TC2H (High)
TC3H (High)
Module Base + 0x0000
TC1H (Low)
TC2H (Low)
TC3H (Low)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Register
0x003C
0x003D
0x003A
0x003B
0x003E
0x003F
IOS[7:0]
Name
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7:0
W
R
W
W
W
W
W
W
R
R
R
R
R
R
IOS7
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Timer Input Capture/Output Compare Select Register (TIOS)
0
7
TC15
TC15
TC15
Bit 7
TC7
TC7
TC7
Figure 14-3. Timer Input Capture/Output Compare Register (TIOS)
IOS6
0
6
= Unimplemented or Reserved
Figure 14-2. ECT Register Summary (Sheet 5 of 5)
TC14
TC14
TC14
TC6
TC6
TC6
6
MC9S12XE-Family Reference Manual Rev. 1.23
Table 14-2. TIOS Field Descriptions
IOS5
5
0
TC13
TC13
TC13
TC5
TC5
TC5
5
IOS4
0
4
TC12
TC12
TC12
TC4
TC4
TC4
Description
4
IOS3
0
3
TC11
TC11
TC11
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
TC3
TC3
TC3
3
IOS2
2
0
TC10
TC10
TC10
TC2
TC2
TC2
2
IOS1
0
1
TC9
TC1
TC9
TC1
TC9
TC1
1
IOS0
Bit 0
TC8
TC0
TC8
TC0
TC8
TC0
0
0
537

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