EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 442

Manufacturer Part Number

EVB9S12XEP100

BOARD EVAL FOR MC9S12XEP100

Manufacturer

Freescale Semiconductor

Module and Misc Hardware

Processor To Be Evaluated

MC9S12XEP100

Data Bus Width

Interface Type

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Rohs Compliant

For Use With/related Products

MC9S12XEP100

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 10 XGATE (S12XGATEV3)

RD | IMM16⇒ RD (translates to ORL RD, #IMM16[7:0]; ORH RD, #IMM16[15:8]

Performs a bit wise logical OR between two 16 bit values and stores the result in the destination

Code and CPU Cycles

OR RD, RS1, RS2

OR RD, #IMM16

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

Set if bit 15 of the result is set; cleared otherwise.

Set if the result is $0000; cleared otherwise.

Refer to ORH instruction for #IMM16 operations.

Not affected.

When using immediate addressing mode (OR RD, #IMM16), the Z-ﬂag of

the ﬁrst instruction (ORL RD, #IMM16[7:0]) is not considered by the

second instruction (ORH RD, #IMM16[15:8]).

⇒ Don’t rely on the Z-Flag.

MC9S12XE-Family Reference Manual , Rev. 1.23

Machine Code

Freescale Semiconductor