EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 1156

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 29 1024 KByte Flash Module (S12XFTM1024K5V2)
29.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x7F_FF0F located in P-Flash memory (see
indicated by reset condition F in
phrase containing the Flash security byte during the reset sequence, all bits in the FSEC register will be
set to leave the Flash module in a secured state with backdoor key access disabled.
1156
KEYEN[1:0]
RNV[5:2}
SEC[1:0]
Offset Module Base + 0x0001
Reset
2. FDIV shown generates an FCLK frequency of 1.05 MHz
Field
7–6
5–2
1–0
W
R
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the
Flash module as shown in
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements.
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
Flash module is unsecured using backdoor key access, the SEC bits are forced to 10.
Flash Security Register (FSEC)
F
7
KEYEN[1:0]
= Unimplemented or Reserved
F
6
1. Preferred KEYEN state to disable backdoor key access.
KEYEN[1:0]
Figure 29-6. Flash Security Register (FSEC)
MC9S12XE-Family Reference Manual , Rev. 1.23
00
01
10
11
Figure
Table 29-10. FSEC Field Descriptions
Table
Table 29-11. Flash KEYEN States
F
5
29-11.
29-6. If a double bit fault is detected while reading the P-Flash
Status of Backdoor Key Access
F
4
RNV[5:2]
Description
DISABLED
DISABLED
DISABLED
ENABLED
F
3
(1)
F
2
Freescale Semiconductor
F
1
Table
Table
SEC[1:0]
29-12. If the
29-3) as
F
0

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