MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 1020

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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READI Module
24.9
This section details the data trace mechanism supported by READI. Data trace is implemented via data
write messaging (DWM) and data read messaging (DRM), as per the IEEE-ISTO 5001 - 1999.
24.9.1
The L-bus allows the RCPU to perform loads and stores, and the L2U to read and write the L-bus
resources. Snooping for data trace on the L-bus requires the READI module to handle the full range of
L-bus cycles. This includes various cases of pipelining and aborted cycles.
Data trace requires snooping the L-bus cycles, and storing the information for qualifying accesses (based
on enabled features and matching target addresses). The READI module traces all data accesses that meet
the selected range and attributes. This includes all RCPU initiated accesses and all L-bus accesses.
L-bus data cycles can have data sizes of 8, 16, or 32 bits.The READI module supports all three data sizes.
In full port mode, 16-bit accesses shift out 24 bits of data so the tool can differentiate them from 8-bit
accesses.
24.9.2
Data trace messages are of five types:
24.9.2.1
The data write message contains the data write value and the address of the target location, relative to the
previous data trace message.
The data write message has the following format:
24-52
Data write
Data read
Data write synchronization
Data read synchronization
Error message
Data Trace
Data Trace for the Load/Store Bus (L-Bus)
Data Trace Message Formats
Data Write Message
In early versions of the READI module, 8-bit data cannot be differentiated
from 16-bit data when the 8 MSBs are set to zero. See the device mask set
errata list for customer information.
TCODE (5)
[6 bits]
Figure 24-44. Data Write Message Format
MPC561/MPC563 Reference Manual, Rev. 1.2
Max Length = 63 bits
Relative Address
Min Length = 15 bits
[1 to 25 bits]
NOTE
[8, 16, or 32 bits]
Data Value
Freescale Semiconductor

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