MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 725

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

16.7.8
16.7.9
Freescale Semiconductor
SRESET
Bits
0:15
SRESET
SRESET
Field
Addr
Field MID
Field MID
Addr
Figure 16-16. Receive Global Mask Register: High (RXGMSKHI), Low (RXGMSKLO)
Free Running Timer (TIMER)
Receive Global Mask Registers (RXGMSKHI, RXGMSKLO)
MSB
0
TIMER
Name
MSB
28
14
16
1
1
0
1
0x30 7092 (RxGMSKLO_A); 0x30 7492 (RxGMSKLO_B); 0x30 7892 (RxGMSKLO_C)
0x30 7090 (RxGMSKHI_A); 0x30 7490 (RxGMSKHI_B); 0x30 7890 (RxGMSKHI_C);
MID
MID
27
13
17
1
1
1
The free running timer counter can be read and written by the CPU. The timer starts from
zero after reset, counts linearly to 0xFFFF, and wraps around.
The timer is clocked by the TouCAN bit-clock. During a message, it increments by one for
each bit that is received or transmitted. When there is no message on the bus, it increments
at the nominal bit rate.
The timer value is captured at the beginning of the identifier field of any frame on the CAN
bus. The captured value is written into the “time stamp” entry in a message buffer after a
successful reception or transmission of a message.
2
0x30 708A (TIMER_A); 0x30 748A (TIMER_B); 0x30 788A (TIMER_C)
Figure 16-15. Free Running Timer Register (TIMER)
MID
MID
26
12
18
1
1
2
3
MID
MID
MPC561/MPC563 Reference Manual, Rev. 1.2
25
11
19
1
1
3
Table 16-19. TIMER Bit Descriptions
4
MID
MID
24
10
20
1
1
4
5
MID
MID
23
21
1
9
1
5
0000_0000_0000_0000
6
MID
MID
22
22
6
1
8
1
7
MID
MID
TIMER
21
23
1
7
1
7
Description
8
MID
MID
20
24
8
1
6
1
9
MID
MID
19
25
1
5
1
9
10
MID
MID
18
10
26
1
4
1
MID
11
11
27
0
0
3
1
MID
12
28
12
1
1
2
1
CAN 2.0B Controller Module
MID
MID
17
13
29
1
1
1
13
MID
MID
16
14
30
1
0
1
14
MID
LSB
15
15
31
1
0
0
LSB
15
16-31