MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 896
MPC564MZP56
Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Specifications of MPC564MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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CDR3 Flash (UC3F) EEPROM
CENSOR[0:1] transitions are listed as follows:
21.3.12 Background Debug Mode or Freeze Operation
While in background debug mode, the UC3F should respond normally to accesses except that LOCK is
writable. See the LOCK bit in
21-34
1. Cleared censorship to no censorship, T1
2. No censorship to information censorship, T2
3. Information censorship, no censorship or unknown to cleared censorship, T3
4. Cleared censorship to information censorship, T4
Set CENSOR[0] or CENSOR[1].
Set CENSOR[0] and CENSOR[1].
Clear CENSOR[0:1]. This is done only while the entire UC3F array is erased.
Set both CENSOR[0] and CENSOR[1].
Table
MPC561/MPC563 Reference Manual, Rev. 1.2
21-3.
Freescale Semiconductor
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