MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 230

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Burst Buffer Controller 2 Module
4-24
1
20:21
22:24
26:27
29:31
This field is available only on the MPC562/MPC564.
Bits
4:19
25
28
0
1
2
3
BTBINH
CMPR
Name
ENR0
ENR1
ENR2
ENR3
The MI_GRA register should be programmed to enable fetch access (PP and
G bits) before RCPU MSR[IR] is set.
PP
—
—
—
G
1
Enable IMPU Region 0
0 Region 0 is off.
1 Region 0 is on.
Enable IMPU Region 1
0 Region 1 is off.
1 Region 1 is on.
Enable IMPU Region 2
0 Region 2 is off.
1 Region 2 is on.
Enable IMPU Region 3
0 Region 3 is off.
1 Region 3 is on.
Reserved
Protection Bits
00 Supervisor – No Access, User – No Access.
01 Supervisor – Fetch, User – No Access.
1x Supervisor – Fetch, User – Fetch.
Reserved
Guard attribute for region
0 Fetch is not prohibited from region. Region is not guarded.
1 Fetch is prohibited from guarded region. An exception will occur under such attempt.
Compressed Region.
x0 The region is not restricted
01 Region is considered a non-compressed code region Access to the region is allowed only in
11 Region is considered a compressed code region. Access to the region is allowed only in
BTB Inhibit region
0 BTB operation is not prohibited for current memory region
1 BTB operation is prohibited for current memory region.
Reserved
“Decompression Off” mode
“Decompression On” mode
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 4-8. MI_GRA Field Descriptions
NOTE
Description
Freescale Semiconductor