MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 105

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

remain secure, even when updating one of the two flash blocks during a code upgrade. The remainder of
this section discusses security from the perspective of a single flash block. Routines for clearing flash
security must be applied to both blocks before the device can be unsecured.
Security is engaged or disengaged based on the state of two nonvolatile register bits (SEC01, SEC00) in
the FxOPT register. During reset, the contents of the nonvolatile location, NVOPT, are copied from flash
into the working FxOPT register in high-page register space. A user engages security by programming the
NVOPT location which can be done at the same time the flash memory is programmed. The 1:0 stage
engages the security and other three combinations disengage security.
Upon exiting reset, the XCSR[25] bit in the ColdFire CPU is initialized to one if the device is secured, zero
otherwise.
A user can choose to allow or disallow a security unlocking mechanism through an 8-byte backdoor
security key. The security key can be written by the CPU executing from internal memory. It cannot be
entered without the cooperation of a secure user program. The procedure for this is detailed in
Section 3.5.1, “Unsecuring the MCU using Backdoor Key
Development tools will unsecure devices via an alternate BDM-based methodology shown in
Because both RESET and BKGD pins can be reprogrammed via software, a power-on-reset is required to
be absolutely certain of obtaining control of the device via BDM, which is a required prerequisite for
clearing security. Other methods (outlined in red in
all circumstances.
3.5.1
The MCU may be unsecured by using the backdoor key access feature that requires knowledge of the
contents of the backdoor keys (see
Section
a comparison between the written data and the backdoor key data stored in the flash memory. If all
backdoor keys are written to the correct addresses in the correct order and the data matches the backdoor
keys stored in the flash memory, the MCU is unsecured. The data must be written to the backdoor keys
sequentially. Values 0x0000_0000 and 0xFFFF_FFFF are not permitted as backdoor keys. While the
KEYACC bit is set, reads of the flash memory return valid data.
The user code stored in the flash memory must have a method of receiving the backdoor keys from an
external stimulus. This external stimulus would typically be through one of the on-chip serial ports.
If the KEYEN[1:0] bits are in the enabled state (see
backdoor key access sequence described below:
Freescale Semiconductor
1. Set FxCNFG[KEYACC].
2. Execute three NOP instructions to provide time for the backdoor state machine to load the starting
3. Sequentially write the correct longwords to the flash address(es) containing the backdoor keys.
4. Clear the KEYACC bit. Depending on the user code used to write the backdoor keys, a wait cycle
address and number of keys required into the flash state machine.
(NOP) may be required before clearing the KEYACC bit.
3.4.3.2) and the KEYACC bit is set, a write to a backdoor key address in the flash memory triggers
Unsecuring the MCU using Backdoor Key Access
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Section
3.6). If the KEYEN[1:0] bits are in the enabled state (see
Figure
Section
3-15) can also be used, but may not work under
Access.”
3.4.3.2), the MCU can be unsecured by the
Figure
Memory
3-15.
3-49