MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 483

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.5.4
The ADC module has a selectable asynchronous hardware conversion trigger, ADHWT, that is enabled
when the ADTRG bit is set and a hardware trigger select event (ADHWTSn) has occurred. This source is
not available on all MCUs. Consult the module introduction for information on the ADHWT source and
the ADHWTSn configurations specific to this MCU.
When the ADHWT source is available and hardware trigger is enabled (ADTRG=1), a conversion is
initiated on the rising edge of the ADHWT after a hardware trigger select event (ADHWTSn) has
occurred. If a conversion is in progress when a rising edge of a trigger occurs, the rising edge is ignored.
In continuous convert configuration, only the initial rising edge to launch continuous conversions is
observed and until conversion gets aborted the ADC will continue to do conversions on the same ADC
Status and Control register that initiated the conversion. The hardware trigger function operates in
conjunction with any of the conversion modes and configurations.
The hardware trigger select event (ADHWTSn) must be set prior to and during the receipt of the ADHWT
signal. If these conditions are not met the converter may ignore the trigger or use the incorrect
configuration. If a hardware trigger select event gets asserted during a conversion, it must stay asserted
until end of current conversion and remain set until the receipt of the ADHWT signal to trigger a new
conversion. The channel and status fields selected for the conversion will depend on the active trigger
select signal (ADHWTSA active selects ADCSC1A; ADHWTSn active selects ADCSC1n).
When the conversion is completed, the result is placed in the data registers associated with the ADHWTSn
received (ADHWTSA active selects ADCRHA:ADCRLA; ADHWTSn active selects
ADCRHn:ADCRLn). The conversion complete flag associated with the ADHWTSn received (COCOn)
is then set and an interrupt is generated if the respective conversion complete interrupt has been enabled
(AIENn=1).
21.5.5
Conversions can be performed as determined by the MODE bits and the DIFFn bit as shown in
Conversions can be initiated by a software or hardware trigger. In addition, the ADC module can be
configured for low power operation, long sample time, continuous conversion, hardware average and
automatic compare of the conversion result to a software determined compare value.
21.5.5.1
A conversion is initiated:
Freescale Semiconductor
•
Following a write to ADCSC1A (with ADCHA bits not all 1’s) if software triggered operation is
selected (ADTRG=0).
Hardware Trigger and Channel Selects
Conversion Control
Initiating Conversions
Asserting more than one hardware trigger select signal (ADHWTSn) at the
same time will result in unknown results. To avoid this, only select one
hardware trigger select signal (ADHWTSn) prior to the next intended
conversion.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
NOTE
Analog-to-Digital Converter (S08ADC16)
Table
21-7.
21-27