MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 546

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

LCD Driver Module
Figure 24-15
V
isolation can protect V
powersw3) = 0), the output and input will be configured in a tri-state condition; that is, they will be
floating.
24-30
V
In
LCD
= V
Out
, and, because the input impedance of the op amp is very high, V
also illustrates a buffer, a voltage follower with an ideal op amp. The buffer, if enabled, gives
R1
R1
R1
The charge pump is optimized for 1/3 bias mode operation only.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 24-15. LCD Charge Pump and V
VSUPPLY[1:0]
(~(HREFSEL) & powersw3)
00
01
10
11
In
~(HREFSEL)
HREFSEL
from current draw from V
Table 24-21. LCD Power Supply Configuration
Drive V
Drive V
Drive V
Drive V
Drive V
CPSEL
LL1
LL3
LL2
LL3
Configuration
LL1
internally from V
V
externally from V
VOLTAGE DIVIDER
BLOCK
internally from V
internally from V
internally from the
LCD
(BBYPASS & powersw3)
(~(BBYPASS) & powersw3)
Or
pin
V
In
NOTE:
+
–
Out
; however, if the buffer is disabled ((~BBYPASS &
CHARGE PUMP
IREG
LCD
DD
DD
DD
V
Out
Voltage Divider Block Diagram
1
0
0
0
powersw1 powersw2 powersw3
powersw1
RVEN
V
0
1
0
0
IREG
In
is isolated from V
V
0
0
1
0
DD
V
V
V
powersw2
LL1
LL2
LL3
Freescale Semiconductor
~CPSEL
~CPSEL
~CPSEL
Out
This