MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 610

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Version 1 ColdFire Debug (CF1_DEBUG)
The examples show the READ_MEM.B{_WS}, READ_MEM.W{_WS} and READ_MEM.L{_WS}
commands.
26.4.1.5.12 READ_PSTB
Read 32 bits of captured PST/DDATA values from the trace buffer at the specified address. The PST trace
buffer contains 64 six-bit entries, packed consecutively into 12 longword locations. See
an illustration of how the buffer entries are packed.
26.4.1.5.13 READ_Rn
If the processor is halted, this command reads the selected CPU general-purpose register (An, Dn) and
returns the 32-bit result. See
If the processor is not halted, this command is rejected as an illegal operation and no operation is
performed.
26.4.1.5.14 READ_XCSR_BYTE
Read the special status byte of XCSR (XCSR[31–24]). This command can be executed in any mode.
26-46
Read PST trace buffer at the specified address
Read general-purpose CPU register
Read XCSR Status Byte
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
0x40+CRN
0x60+CRN
host →
host →
target
target
host →
target
0x2D
Table 26-24
D
D
L
Y
L
Y
target →
PSTB data
[31–24]
XCSR
target →
target →
Rn data
[31–24]
[31-24]
host
host
host
for the CRN details when CRG is 01.
PSTB data
target →
target →
Rn data
[23–16]
[23-16]
host
host
PSTB data
target →
target →
Rn data
[15–8]
[15-8]
host
host
PSTB data
target →
target →
Rn data
[7–0]
[7-0]
host
host
Active Background
Always Available
Non-intrusive
Freescale Semiconductor
Figure 26-15
for