MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 442

IC MCU 32BIT 128KB FLASH 100LQFP

MCF51EM128CLL

Manufacturer Part Number
MCF51EM128CLL
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM128CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM128CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
16-Bit Modulo Timer (MTIM16)
When either MTIMxCNTH or MTIMxCNTL is read, the content of the two registers is latched into a
buffer where they remain latched until the other register is read.This allows the coherent 16-bit to be read
in both big-endian and little-endian compile environments and ensures the 16-bit counter is unaffected by
the read operation. The coherency mechanism is automatically restarted by an MCU reset or setting of
TRST bit of MTIMxSC register (whether BDM mode is active or not).
When BDM is active, the coherency mechanism is frozen such that the buffer latches remain in the state
they were in when the BDM became active, even if one or both halves of the counter register are read while
BDM is active. This assures that if the user was in the middle of reading a 16-bit register when BDM
became active, the appropriate value from the other half of the 16-bit value will be read after returning to
normal execution.The value read from the MTIMxCNTH and MTIMxCNTL registers in BDM mode is
the value of these registers and not the value of their read buffer.
19.4.4
19-6
MODH
CNTL
Field
Field
7:0
7:0
Reset:
Reset:
W
W
R
R
MTIM16 Count (Low Byte) — These eight read-only bits contain the current low byte value of the 16-bit counter.
writing has no effect to this register. Reset clears the register to 0x00.
MTIM16 Modulo (High Byte) — These eight read/write bits contain the modulo high byte value used to reset the
counter and set TOF.Reset sets the register to 0x00.
MTIM16 Modulo Register High/Low (MTIMxMODH/MTIMxMODL)
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
7
0
7
0
Figure 19-6. MTIM16 Modulo Register High (MTIMxMODH)
Figure 19-5. MTIM16 Counter Register Low (MTIMxCNTL)
0
0
6
6
Table 19-6. MTIMxMODH Field Descriptions
Table 19-5. MTIMxCNTL Field Descriptions
0
0
5
5
0
0
4
4
Description
Description
MODH
CNTL
0
0
3
3
0
0
2
2
Freescale Semiconductor
0
0
1
1
0
0
0
0

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