MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 199

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.2.6
The VBR contains the base address of the exception vector table in the memory. To access the vector table,
the displacement of an exception vector is added to the value in VBR. The lower 20 bits of the VBR are
not implemented by ColdFire processors. They are assumed to be zero, forcing the table to be aligned on
a 1 MB boundary.
8.2.7
The CPUCR provides supervisor mode configurability of specific core functionality. Certain hardware
features can be enabled/disabled individually based on the state of the CPUCR.
Freescale Semiconductor
In addition, because the V1 ColdFire core supports a 16 MB address space, the upper byte of the VBR is
also forced to zero. The VBR can be used to relocate the exception vector table from its default position
in the flash memory (address 0x(00)00_0000) to the base of the RAM (address 0x(00)80_0000) if needed.
Reset
BDM: 0x802 (CPUCR)
W
R
Load: 0xE2 (CPUCR)
Store: 0xC2 (CPUCR)
ARD IRD IAE IME BWD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 – – – – – – – – – – – – – – – – – – – –
BDM: 0x801 (VBR)
31
0
W
R 0 0 0 0 0 0 0 0
Vector Base Register (VBR)
CPU Configuration Register (CPUCR)
30
Load: 0xE1 (VBR)
Store: 0xC1 (VBR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
29
0
28
0
27
0
Figure 8-8. CPU Configuration Register (CPUCR)
26
0
0
Figure 8-7. Vector Base Register (VBR)
FSD
25
0
Address
CB
RR
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Base
0
– – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – –
Access: Supervisor read/write
8
7
Access: Supervisor read/write
6
8
5
7
BDM read/write
4
6
3
5
BDM read/write
2
4
ColdFire Core
1
3
0
2
1
8-7
0