MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 257

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.1.3
11.1.4
11.1.5
Freescale Semiconductor
CNT1
CNT2
Field
Field
7-0
7-0
Reset:
Reset:
Reset:
W
W
W
R
R
R
CSS XOSC1 Timer Register (CCSTMR1)
CSS XOSC2 Timer Register (CCSTMR2)
CSS Internal Reference Clock Timer Register (CCSTMRIR)
CNT1 - This register is one of three used to compare XOSC1, XOSC2 and internal relaxation oscillator
frequencies. It is initialized to zero upon a write of “1” to CSSCTRL[TEST]. It contains a valid value once
CSSCTRL[TEST] resets itself to “0”. By comparing the values of the three registers, application code can
determine the crude health of the various clock sources.
CNT2 - This register is one of three used to compare XOSC1, XOSC2 and internal relaxation oscillator
frequencies. It is initialized to zero upon a write of “1” to CSSCTRL[TEST]. It contains a valid value once
CSSCTRL[TEST] resets itself to “0”. By comparing the values of the three registers, application code can
determine the crude health of the various clock sources.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 11-5. CSS Internal Reference Clock Timer Register (CSSTMRIR)
7
0
7
0
7
0
Figure 11-3. CSS XOSC1 Timer Register (CSSTMR1)
Figure 11-4. CSS XOSC2 Timer Register (CSSTMR2)
Table 11-3. CSSTMR1 Register Field Descriptions
Table 11-4. CSSTMR2 Register Field Descriptions
0
0
0
6
6
6
0
0
0
5
5
5
0
0
0
4
4
4
Description
Description
CNTIR
CNT1
CNT2
0
0
0
3
3
3
0
0
0
2
2
2
Internal Clock Source (ICS)
0
0
0
1
1
1
0
0
0
0
0
0
11-3