MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 276

IC MCU 32BIT 128KB FLASH 100LQFP

MCF51EM128CLL

Manufacturer Part Number
MCF51EM128CLL
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM128CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM128CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8-bit Serial Peripheral Interface (SPI)
12.1.3
As shown in
prescale bits (SPPR2:SPPR1:SPPR0) choose a prescale divisor of 1, 2, 3, 4, 5, 6, 7, or 8. The three rate
select bits (SPR3:SPR2:SPR1:SPR0) divide the output of the prescaler stage by 2, 4, 8, 16, 32, 64, 128,
256,or 512 to get the internal SPI master mode bit-rate clock.
12-4
BUS RATE
CLOCK
SPI SYSTEM
ENABLE
LSBFE
MSTR
SPE
SPI Baud Rate Generation
CLOCK GENERATOR
Figure
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
SPIBR
MASTER/SLAVE
MODE SELECT
12-3, the clock source for the SPI baud rate generator is the bus clock. The three
SHIFT
OUT
SHIFT
DIRECTION
Tx BUFFER (WRITE
Rx BUFFER (READ
MODE FAULT
DETECTION
SPI SHIFT REGISTER
CLOCK
CLOCK
LOGIC
SHIFT
Figure 12-2. SPI Module Block Diagram
MODF
Rx BUFFER
SPRF
FULL
SPIx
SPIx
D)
D)
Tx BUFFER
EMPTY
SHIFT
SPTEF
SPTIE
SPIE
IN
MASTER CLOCK
SLAVE CLOCK
BIDIROE
MODFEN
SPC0
SSOE
PIN CONTROL
M
S
M
S
M
S
MASTER/
SLAVE
Freescale Semiconductor
SPI
INTERRUPT
REQUEST
MOSI
(MOMI)
MISO
(SISO)
SPSCK
SS

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