MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 388

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Independent Robust Real Time Clock (IRTC)
17.3
17.4
The IRTC block provides basic time keeping functions by second, minute and hour counters and
calendaring functions via date, day-of-week, month and year counters; with automatic adjustment for leap
year and day light saving. Reading these counters indicates the current date and time and writing to these
registers sets the date and time given by the user. The user has the option of reading and writing into time
and date related registers in either BCD or Binary format.
The alarm is set for specific hour, minute and second. When the time counters match the alarm hour,
minute and second setting, the alarm flag is set and an interrupt to CPU is generated if the alarm interrupt
is enabled. The alarm can additionally be configured to match days, months and year to generate the alarm
interrupt. The alarm signal has been brought out from IRTC for use by MCU to allow certain wakeup
events.
17-4
rtc_osc_clk_in
config_data
rtc_alarm
rtc_int_b
Block Diagram
Overview
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
8
Register Space
State Machine
Standby RAM
Write Protect
IRTC_SYN
cpu_high_voltage
bal_1hz_clk_in
Figure 17-1. IRTC Block Diagram
buffer
Compensation
Clock
Standby Isolation
IPS Bus Decode
Time, Calendar
IPS Interface
& Stopwatch
Counters
rtc_osc_buf_clk
RTC Control
rtc_standby_b
Prescalar
Counter Control
Alarm Matching
Saving Control)
(with Day Light
Detection
Tamper
1’b0
Freescale Semiconductor
battery_disconnected
rtc_osc_out_clk
rtc_off_chip_clk
rtc_cal_out
rtc_por
rtc_supply
rtc_ground
temper_detect