MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 452

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Cyclic Redundancy Check (CRC)
Now the first byte of the data on which the CRC calculation will be applied should be written to CRCL.
This write after the completion of the seed mechanism will trigger the CRC module to begin the CRC
checking process. The CRC generator will shift the bits in the CRCL register (MSB first) into the shift
register of the generator. After all 8 bits have been shifted into the CRC generator (in the next bus cycle
after the data write to CRCL), the result of the shifting, or the value currently in the shift register, can be
read directly from CRCH:CRCL, and the next data byte to include in the CRC calculation can be written
to the CRCL register.
This next byte will then also be shifted through the CRC generator’s 16-bit shift register, and after the
shifting has been completed, the result of this second calculation can be read directly from CRCH:CRCL.
After each byte has finished shifting, a new CRC result will appear in CRCH:CRCL, and an additional
byte may be written to the CRCL register to be included within the CRC16-CCITT calculation. A new
CRC result will appear in CRCH:CRCL each time 8-bits have been shifted into the shift register.
To start a new CRC calculation, write to CRCH, and the seed mechanism for a new CRC calculation will
begin again.
20.4.1
The CRC polynomial 0x1021 (x
proposed by the ITU-T (formerly CCITT) committee.
Although the ITU-T recommendations are very clear about the polynomial to be used, 0x1021, they accept
variations in the way the polynomial is implemented:
Moreover, it is common to find circuits in literature slightly different from the one suggested by the
recommendations above, but also known as CRC-CCITT circuits (many variations require the message to
be augmented with zeros).
The circuit implemented in the CRC module is exactly the one suggested by the ITU-T V.41
recommendation, with an added flexibility of a programmable SEED. As in ITU-T V.41, no augmentation
is needed and the CRC result is not negated.
a reference. Notice that these are ASCII string messages. For example, message “123456789” is encoded
with bytes 0x31 to 0x39 (see ASCII table).
20-6
•
•
ITU-T V.41 implements the same circuit shown in
0x0000.
ITU-T T.30 and ITU-T X.25 implement the same circuit shown in
recommend the final CRC result to be negated (one-complement operation). Also, they
recommend a SEED = 0xFFFF.
ITU-T (CCITT) Recommendations and Expected CRC Results
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
ASCII String Message
16
+ x
Table 20-5. Expected CRC results
“A”
“A”
12
+ x
5
+ 1) is popularly known as CRC-CCITT since it was initially
Table 20-5
(initial CRC value)
shows some expected results that can be used as
0x0000
Figure
SEED
0xffff
20-1, but it recommends a SEED =
CRC result
0x58e5
0xb915
Figure
20-1, but they
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