MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 88

• Manufacturer Part Number: MCF51EM128CLL
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Memory
3.4.3.4
The FxPROT register defines which flash sectors are protected against program or erase operations.
FxPROT bits are readable and writable as long as the size of the protected flash memory is being increased.
Any write to FxPROT that attempts to decrease the size of the protected flash memory is ignored.
During the reset sequence, the FxPROT register is loaded from the flash protection byte in the flash
configuration field, indicated by F in
sequence, the flash sector containing the flash configuration field must be unprotected. Then, the flash
protection byte must be reprogrammed.
Trying to alter data in any protected area in the flash memory results in a protection violation error and
FxSTAT[FPVIOL] is set. The mass erase of the flash array is not possible if any of the flash sectors
contained in the flash array are protected.
3-32
KEYACC
Reset
CBEIE
Field
CCIE
4–0
7
6
5
W
R
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see
(FxSTAT)”) is set.
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see
is set.
Enable Security Key Writing
0 Writes to the flash block are interpreted as the start of a command write sequence.
1 Writes to the flash block are interpreted as keys to open the backdoor.
Reserved,
Flash Protection Register (FxPROT and NVPROT)
0
7
MCF51EM256 series have two flash blocks. Each block protection is
configured by its respective FxPROT and NVPROT registers. The flash
block swap feature is described in
Memory
memory addresses.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Locations.” The protection follows the flash block instead of the
CCIE
0
6
Figure 3-5. Flash Configuration Register (FxCNFG)
Table 3-9. FxCNFG Field Descriptions
KEYACC
Figure
0
5
3-6. To change the flash protection loaded during the reset
NOTE
Section 3.6, “Flash Module Reserved
0
0
4
Description
3
0
0
Section 3.4.3.5, “Flash Status Register
Section 3.4.3.5, “Flash Status Register
0
0
2
Freescale Semiconductor
0
0
1
(FxSTAT)”)
0
0
0