HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 125

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6.2
Table 6.1 shows the INTC pin configuration.
Table 6.1
6.3
The interrupt controller has the following registers. For details on register addresses and register
states during each processing, refer to section 25, List of Registers.
• Interrupt control register 1 (ICR1)
• Interrupt control register 2 (ICR2)
• IRQ status register (ISR)
• Interrupt priority register A (IPRA)
• Interrupt priority register B (IPRB)
• Interrupt priority register C (IPRC)
• Interrupt priority register D (IPRD)
• Interrupt priority register E (IPRE)
• Interrupt priority register F (IPRF)
• Interrupt priority register G (IPRG)
• Interrupt priority register H (IPRH)
• Interrupt priority register I (IPRI)
• Interrupt priority register J (IPRJ)
Name
Non-maskable interrupt input pin
Interrupt request input pins
Interrupt request output pin
Input/Output Pins
Register Descriptions
Pin Configuration
IRQ0 to IRQ7
IRQOUT
Abbreviation
NMI
I
O
I/O
I
Rev.4.00 Mar. 27, 2008 Page 79 of 882
Function
Input of non-maskable interrupt
request signal
Input of maskable interrupt request
signals
Output of notification signal when an
interrupt has occurred
6. Interrupt Controller (INTC)
REJ09B0108-0400