HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 59

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
[Caution]
Type
User
debugging
interface
(H-UDI)
(flash version
only)
Advanced
user debugger
(AUD)
(flash version
only)
E10 interface
(flash version
only)
Do not pull-down the WDTOVF pin. If this pin needs to be pulled-down, however, the
resistor value must be 1 MΩ or higher.
TCK
TMS
TDI
TDO
TRST
AUDATA3 to
AUDATA0
AUDRST
AUDMD
AUDCK
AUDSYNC
ASEBRKAK Output
DBGMD
Symbol
I/O
Input
Input
Input
Output
Input
Input/
Output
Input
Input
Input/
Output
Input/
Output
Input
Name
Test clock
Test mode
select
Test data
input
Test data
output
Test reset
AUD data
AUD reset
AUD mode
AUD clock
AUD
synchroniza-
tion signal
Break mode
acknowledge
Debug mode
Test clock input pin.
Test mode select signal input pin.
Instruction/data serial input pin.
Instruction/data serial output pin.
Initialization signal input pin.
Branch trace mode: Branch destination
address output pins.
RAM monitor mode: Monitor address
input/data input/output pins.
Reset signal input pin.
Mode select signal input pin.
Branch trace mode: Low
RAM monitor mode: High
Branch trace mode: Synchronous clock
output pin.
RAM monitor mode: Synchronous clock
input pin.
Branch trace mode: Data start position
identification signal output pin.
RAM monitor mode: Data start position
identification signal input pin.
Shows that E10A has entered to the break
mode. Refer to “SH7144F E10A Emulator
User’s Manual” for the detail of the
connection to E10A.
Enables the functions of E10A emulator.
Input low to the pin in normal operation
(other than the debug mode). In debug
mode, input high to the pin on the user
board. Refer to “SH7144F E10A Emulator
User’s Manual” for the detail of the
connection to E10A.
Function
Rev.4.00 Mar. 27, 2008 Page 13 of 882
REJ09B0108-0400
1. Overview

Related parts for HD6417144F50V