HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 147

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

The user break controller (UBC) provides functions that make program debugging easier. By
setting break conditions in the UBC, a user break interrupt is generated according to the contents
of the bus cycle generated by the CPU or DMAC/DTC. This function makes it easy to design an
effective self-monitoring debugger, and customers of the chip can easily debug their programs
without using a large in-circuit emulator.
7.1
• There are 5 types of break compare conditions as follows:
• User break interrupt generated upon satisfying break conditions
• User break interrupt generated before an instruction is executed by selecting break in the CPU
• Module standby mode can be set
UBC0001A_000020010800
⎯ Address
⎯ CPU cycle or DMAC/DTC cycle
⎯ Instruction fetch or data access
⎯ Read or write
⎯ Operand size: longword/word/byte
instruction fetch.
Features
Section 7 User Break Controller (UBC)
Rev.4.00 Mar. 27, 2008 Page 101 of 882
7. User Break Controller (UBC)
REJ09B0108-0400