HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 436
HD6417144F50V
Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet
1.HD64F7144F50V.pdf
(932 pages)
Specifications of HD6417144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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12. Watchdog Timer
Reading from TCNT, TCSR, and RSTCSR: TCNT, TCSR, and RSTCSR are read like other
registers. Use byte transfer instructions. The read addresses are H'FFFF8610 for TCSR,
H'FFFF8611 for TCNT, and H'FFFF8613 for RSTCSR.
12.6.2
If a timer counter increment clock pulse is generated during the T3 state of a write cycle to TCNT,
the write takes priority and the timer counter is not incremented. Figure 12.8 shows this operation.
Rev.4.00 Mar. 27, 2008 Page 390 of 882
REJ09B0108-0400
TCNT Write and Increment Contention
• Writing 0 to the WOVF bit
• Writing to the RSTE and RSTS bits
Address: H'FFFF8612
Address: H'FFFF8612
Figure 12.8 Contention between TCNT Write and Increment
Address
Internal write
signal
TCNT input
clock
TCNT
φ
Figure 12.7 Writing to RSTCSR
15
15
TCNT write cycle
T 1
H'A5
H'5A
TCNT address
N
T 2
8
8
Counter write data
7
7
T 3
M
Write data
H’00
0
0
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